1. Field of the Invention
The present invention relates to a pattern recognition apparatus and a pattern recognition method, more particularly, to an apparatus and method for recognizing, with a high accuracy and a high speed, bonding lead patterns and bonding pad patterns (hereinafter referred to as lead patterns and pad patterns) of an integrated circuit (IC) or elements such as transistors, and diodes, formed on a hybrid IC substrate, so as to enable an efficient automatic wire bonding operation between the lead and the bonding pad.
2. Description of the Prior Art
One of the applications of an apparatus for detecting the position of patterns is in the field of automatic wire bonding for assembling a semiconductor IC or a semiconductor hybrid IC.
To accomplish successful automatic wire bonding in assembling a semiconductor hybrid IC (or semiconductor IC), it is desired that the position of each pad pattern of elements on the hybrid IC and the position of each lead pattern on the hybrid IC be detected both quickly and accurately. If the positions of the pad patterns and the lead patterns are not detected quickly and accurately, the assembly process will be delayed or the yield of products will be reduced.
Two methods are known for detecting lead patterns and pad patterns, i.e., a pattern matching method and a pattern feature extracting method (see, for example, Semiconductor International, February 1981, pp 53 to 70, "Pattern Recognition on Bonders and Probers", and Japanese Unexamined Patent Publication (Kokai) No. 55-187258 and U.S. Pat. No. 4,450,579). Both these methods have advantages and disadvantages when applied to a pattern-position recognizing apparatus used for assembling hybrid IC's. Thus, neither method is totally satisfactory when used in an automatic wire bonding apparatus.
In both of these conventional methods, the surface of a hybrid IC is scanned by a TV camera or the like to obtain image signals of the lead patterns or part of an element pattern including pad patterns. The image signals obtained by the scanning are converted into binary-coded signals.
In the conventional pattern matching method, the binary-coded data representing the scanned lead pattern or the part of the element are compared with the image data of a reference pattern of a standard sample whose position is previously known, by means of one-dimensional or two-dimensional correspondence, to determine correlations therebetween. When a correlation between the scanned pattern and the reference pattern is the maximum among all of the correlations, the position of the scanned pattern is identified.
In this conventional pattern matching method, however, there are several disadvantages. First, in the case of thick-film hybrid IC's, the lead patterns are formed by means of printing. Because of the printing, the surface of each lead pattern is too rough to find the maximum correlation in pattern matching. Thus, it is difficult to accurately detect the position of each lead pattern.
Second, if the element to be recognized is mounted on a substrate with a small rotation angle with respect to the standard sample, the binary-coded data representing the scanned pattern will not completely coincide with the image data of the reference pattern. This noncoincidence also occurs because of a production-prober's scratch on each lead pattern, or on each pad pattern, the scratch being inevitably formed during electrical testing of the IC or the hybrid IC before the wire bonding process. The scanned pattern generally does not coincide exactly with the reference pattern due to other noise as well. Under these circumstances, it is difficult to identify the scanned pattern which coincides with the reference pattern. Thus, the position of the scanned pattern may often be erroneously determined. In other words, the accuracy of the position detection is poor.
In the conventional pattern-feature extracting method, a specific shape, size, or area of a pattern is detected by, for example, extracting a pattern width and a middle point of the pattern with the use of a view-window determining circuit. This second method also has several disadvantages. As in the case of the first conventional method, it is difficult to determine the specific shape, size, or area of the rough surface of a lead pattern formed by printing. Also, erroneous positions may be determined when noise is introduced into the binary-coded data obtained by scanning a pattern. Further, a hybrid IC mounts various patterns of elements, such as rectangular-shaped patterns or egg-shaped patterns of IC's, transistors, diodes, etc., making it difficult to extract a specific feature. For example, it is difficult to determine the middle point of an egg-shaped pattern. Therefore, the feature extracting method is not adequate for recognizing a pattern on a hybrid IC.